74HC1G08GW,125
2-input AND gate
  • QUANTITY
  • 0
  • Lead Time:
  • D/C [Date Code]:
  • N/A
  • Packing Condition:

Features

• Input levels:
– For 74HC1G08: CMOS level
– For 74HCT1G08: TTL level
• Symmetrical output impedance
• High noise immunity
• Low power dissipation
• Balanced propagation delays
• ESD protection:
– HBM JESD22-A114F exceeds 2000 V
– MM JESD22-A115-A exceeds 200 V
• Multiple package options
• Specified from −40 °C to +85 °C and −40 °C to +125 °C

Specifications


Pin Configuration

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Part Numbering System

Part Marking System

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Ordering Guide

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Block Diagram

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관련상품